Electronics Faculties

[1] Vanlalchaka, R.H; Roy, S.; Power Efficient Adiabatic Gray to Binary & Binary to Gray            Code Converter, Int. Jr. on Current Sc. & Tech., Vol-1, No.-,January-June 2013, pp: 119-124, ISSN : 23205636

[2] Vanlalchaka, R.H; Roy, S.; Acetycholine Gate Spiking Nuron Model, Int. Jr. on Current Sc. & Tech., Vol-1, No.-,January-June 2013, pp: 119-124, ISSN : 23205636

[3] Vanlalchaka, R.H; Roy, S.; Design & Analysis of N-Bit Comp[arator Based on Low Power Adiabatic Logic Technique, Int. Jr. on Current Sc. & Tech., Vol-1, No.-,January-June 2013, pp: 119-124, ISSN : 23205636

[4] Vanlalchaka, R.H; Roy, S.; 4-Bit Ripple Carry Adder using Proposed Energy Efficient Single Phase Adiabatic Logic Technique, Int. Jr. on Current Sc. & Tech., Vol-1, No.-,January-June 2013, pp: 119-124, ISSN : 23205636

[5] Konwar, S; Singha, T.B; Roy, S; Vanlalchaka, R.H.; Power Efficient Priority Encorder & Decorder, IEEE Int. Conf on Comp.Comm & Informs (ICCCI-2014) Jan, 02-05, 2014, Coimbator India. ISBN: 98-1-4799-2352-6/14

[6] Konwar, S; Singha, T.B; Roy, S; Vanlalchaka, R.H.; Adiabatic Logic Based Multiplexer & De-Multiplexer. IEEE Int. Conf on Comp.Comm & Informs (ICCCI-2014) Jan, 02-05, 2014, Coimbator India. ISBN:798-1-4799-2352-6/14

[7] Vanlalchaka, R.H; Roy, S.; Power Efficient Odd Parity Generation & Checker Circuits, Int. Conf. on Emerging Trends and Appl.In Cmp Sci. ICTACS-2013. ISBN : 978-1-4673-5250-5/13.

[8] Vanlalchaka, R.H; Maity, N.P; Zonunmawii.; “Correlation analysis between drowsiness and HRV parameters” Mizoram Science Congress 2018 (MSC 2018) Atlantic Press, Advances In Engineering Research, Volume 178, ISBN : 978-94-6252-638-9; ISSN : 2352-5401 Publication date : 24/12/2018

[9] Vanlalchaka, R.H; Maity, N.P.; “Power Efficient 8421 Code to Excess-3 Code Converter: A new Circuit Designed Approach” Int. Conf. In Recent Trends on Electronics & Computer Science ( ICRTECS-2019), 18^th -19^th March 2019. ( The paper was already accepted and to be publised in the conference proceedings besides its extended version will be publised in SCI/SCOPUS journals )

[1] “Power Efficient Odd Parity Generation & Checker Circuits” in 2013, 1^st Int. Conf. on Emerging Trends and Appl.In Cmp Sci. ICTACS-2013 in Shillong, Meghalaya. Technically Sponsored by IEEE Calcutta section.

[2] “Acetycholine Gate Spiking Nuron Model” In North Eastern Region Science Congress (11^th -13^th March 2013) Organised by NIT Arunachal Pradesh & Indian Science Congress.

[3] “Power Efficient Adiabatic Gray to Binary & Binary to Gray Code Converter Circuits”

In North Eastern Region Science Congress( 11^th -13^th March 2013) Organised by NIT     Arunachal Pradesh & Indian Science Congress.

[4]“Correlation analysis between drowsiness and HRV parameters” in the Mizoram Science Congress 2018. Ntl.Conf, held at Pachhunga University College, 4^th -5^th October, 2018.

[5] “One day National workshop on Electronics Device” Organised by Deptt. Of Electronics & Communication Engineering, MZU & IEEE-EDS Calcutta section on 7^th April 2011 at Mizoram University.

[6] “A three day National Workshop entitled Advances in Electronics, Communication & Information Technology (AECI-2011)” held at Mizoram University on 23th -27^th March 2011. Under the auspices of IEEE National distinguished Lecture Programme, Calcutta section, RPE, University of Calcutta.

[7] Two Days Workshop on Digsilent Power Factory (TVASTAR Engineering Solution Pvt. Ltd. Haryana) Organised by Dep’t. Of Electrical Engineering, MZU on 01^th to 02^th 2015.