Dr Lalthanpuii Khiangte

Dr. Lalthanpuii Khiangte

Assistant Professor

Department of Electronics

QUALIFICATIONS

B.Tech (Electronics & Communication Engineering)
M.Tech (Very Large Scale Integration)
Ph.D.

SPECIALIZATIONS

Ph.D. Thesis: Development of Tri-layered HOI Structure for NanoFET

CONTACTS

Email: This email address is being protected from spambots. You need JavaScript enabled to view it.
Mobile : 9612149602

International Referred Journals:

[1]. L.Khiangte and R.S.Dhar, "Development of Tri-Layered s-Si/s-SiGe/s-Si Channel Heterostructure on Insulator MOSFET for Enhanced Drive Current", Phys. status solidi B, 255(8), Aug., 2018, 1800034. (SCI Impact Factor 1.729) doi:https://doi.org/10.1002/pssb.201800034

[2]. L.Khiangte and R.S.Dhar, "Strained Si/SiGe/Si Nano-Channel HOI MOSFET", ", Int. Journal on Innovative Technology and Exploring Engineering (IJITEE), 20, March, 2019, 8(4S2), 260-263. (Scopus). D1S0057028419/19©BEIESP

[3]. L.Khiangte and R.S.Dhar, "Sub-50nm Tri-Layered Strained Si/SiGe/Si Channel nMOSFET", Int. Journal on Innovative Technology and Exploring Engineering (IJITEE), 8 (6S), April, 2019, 361-364. (Scopus). F61310486S19©BEIESP

[4]. R.S Dhar, L. Khiangte and K. Kumar "Strain Engineering Analysis for Nanoscaled Tri-layered Heterostructure-on-Insulator", International Journal of Nanoscience, World Scienti
fic, 2019. (Accepted in press) https://doi.org/10.1142/S0219581X20400013 (Scopus,ESCI)

[5]. K.Kumar, L.Khiangte and R.S.Dhar "Design of DG MOSFET with Tri-Layered Strained Silicon Channel", J. Phys.: Conf. Ser. 1478 012002. doi:10.1088/1742-6596/1478/1/012002 (Scopus)

Book Chapter:

R.S. Dhar, L. Khiangte, P. Sultana and A. Kumar, "Analysis of Capacitance-Voltage Characteristics for Ultra-thin Si/SiGe/Si Hetero-layered MOS Structure", Advances in Bioinformatics, Multimedia, and Electronics Circuits and Signals, Advances in Intelligent Systems and Computing 1064; pp 83-89,© Springer Nature Singapore Pte Ltd. 2020

https://doi.org/10.1007/978-981-15-0339-9_8 (IF: 0.57)

L.Khiangte and R.S.Dhar, "Three layered channel with strained Si/SiGe/Si HOI MOSFET", Int. Conf. on Intelligent Computing and Smart Communication, (ICSC-2019) , Springer, pp 1405-1412 Tehri, April, 2019. https://doi.org/10.1007/978-981-15-0633-8_138

L.Khiangte and R.S.Dhar, "TCAD Modelling of 30nm Strained Si/SiGe/Si Channel MOSFET", Int. Conf. on Intelligent Computing and Smart Communication, (ICSC-2019) , Springer 2020, pp 1383 Algorithms for Intelligent System. https://doi.org/ I 0.1007/978-981-15-0633-8_135

International Referred Conferences:

[1]. L.Khiangte and R.S.Dhar, "Development of double strained Si channel for heterostructure on insulator MOSFET", 2017 2nd International Conference on Man and Machine Interfacing (MAMI), IEEE, Bhubaneshwar, Dec., 2017, pp. 1-3. DOI: 10.1109/MAMI.2017.8307871

[2]. L.Khiangte and R.S.Dhar, "Double Strained Si Channel Heterostructure on Insulator MOSFET in sub-100nm regime", Man and Machine Interfacing (MAMI), 2017 2nd Int. Conf., IEEE, Bhubaneshwar, Dec., 2017, pp. 1-4. DOI: 10.1109/MAMI.2017.8329843

[3]. L.Khiangte and R.S.Dhar, "Double Strained Channel MOSFET: Deep Into Sub-Microns", 2018 Conference on Information and Communication Technology (CICT), IEEE, Jabalpur, 26-28 Oct. 2018 , DOI: 10.1109/INFOCOMTECH.2018.8722385

[4]. L.Khiangte and R.S.Dhar, "Tri-layered Strained Si/SiGe/Si Channel HOI MOSFET", Int. Conf. on Innovative Technologies in Engineering (ICITE-2018), IEEE, Hyderabad, April, 2018. (Best Paper Awarded)

[5]. L.Khiangte and R.S.Dhar, "Two Strained-Si layers in Channel region of HOI MOSFET", 2018 IEEE Electron Device Kolkata Conference (2018 IEEE EDKCON), IEEE, Kolkata, 24-25 Nov. 2018. DOI: 10.1109/EDKCON.2018.8770409

[6].L. Khiangte, R. S. Dhar, K. Kumar and J. Laldingliana, " State-of-the-art MOSFET and TCAD in the advancement of technology: A review", Mizoram Science Congress 2018 (MCS 2018)- Perspective and Trends in the Development of Science Education and Research, Atlantis Press, Mizoram, Dec., 2018. https://doi.org/10.2991/msc-18.2018.6

[7]. L.Khiangte and R.S.Dhar, "Investigation of 30nm Tri-layered Strained Silicon HOI MOSFET using TCAD", Int. Conf. on Circuits and Systems in Digital Enterprise Technology, IEEE, Kottayam, India Kerala, 02 September 2019. DOI: 10.1109/ICCSDET.2018.8821220 (Best Paper Awarded)

[8]. K. Kumar, L. Khiangte and R. S. Dhar, "Design of Double Gate Nano-FET", Second Int. Conf. on Advanced Computational and Communication paradigms (ICACCP 2019), IEEE, 25-28 Feb. 2019 Gangtok, India. DOI: 10.1109/ICACCP.2019.8882931

[9].Z.Liana, L.Khiangte, S.Dash and R.S.Dhar, “Drift Diffusion and advance Hydrodynamic Simulation for the Design of Double-Gate SOI MOSFET in Nano-Scale Regime” Second Int. Conf. on Advanced Computational and Communication paradigms (ICACCP 2019), IEEE, 1-4(2019).

Academic Achievements

First person of Mizo origin (both from Men and Women) to earned Ph.D. in the field of Electronics & Communication Engineering
Professional Certification	: EXCEL Telecom Professional Certification, Ericson, 2011
Best Paper Award	: International Conference on Innovative Technology in Engineering (ICITE-2018), IEEE, Hyderabad, April, 2018
Best Paper Award	: International Conference on Circuits and Systems in Digital Enterprise Technology, IEEE, Kerala, Dec., 2018
Certificate of Appreciation	: In commemoration of National Science Day-28.02.2020 by Mizoram Science, Technology & Innovation Council (MISTIC), (An Autonomous Government Institution; Directorate of Science & Technology, Govt. of Mizoram)
Certificate of Appreciation	: by Mizo Hmeichhe Insuihkhawm Pawl (MHIP), Bungkawn Branch (17.12.2019) {Govt. affiliated NGO for upliftment of Mizo Women (Registration No. 5 of 1977, Society Act 1860 (Act XXI of 1960)}

Applied Patent

A M-O-(Si/Sige/Si) Structured Device Of Tri-Layered Nanosystem Semiconductor And Its Process Thereof	Australian Patent Application No. 2021105085 Filing Date: 07.08.2021 Dhar, Rudra Sankar; Khiangte, Lalthanpuii; Kumar, Kuleen; Nanda, Swagat; Talukdar, Silpee
A Nanosystem Device For Faster Switching With Reduced Leakage And Its Preparing Process Thereof	Australian Patent Application No. 2021105335 Filing Date: 11.08.2021 Dhar, Rudra Sankar; Kumar, Kuleen; Talukdar, Silpee; Khiangte, Lalthanpuii; Nanda, Swagat
A Nano-Composites Based Smart Membrane Device With Enhanced Performance And Its Preparation Process Thereof	Australian Patent Application No. 2021105410 Filing Date: 13.08.2021 Dhar, Rudra Sankar; Talukdar, Silpee; Khiangte, Lalthanpuii; Kumar, Kuleen; Nanda, Swagat
Ultra-thin composite of hetero-semiconductor assembly loaded onto oxide/metal forming a five-layered dielectric based capacitive system at nano regime	Indian Patent Application No. 202031053152 Registration Date: 17.12.2020 Inventor: Lalthanpuii Khiangte, Rudra Sankar Dhar, Kuleen Kumar Co-inventors: 2
Dual Kite Based Continuous High Altitude Wind Power Generation System (Examination Completed)	Indian Patent Application No. 201831017852 Registration Date: 11.05.2018 Inventor: Roystan Vijay Castelino, Suman Jha, Pabitra Kumar Biswas, Lalthanpuii Khiangte Co-inventors: 3

Professional Membership

Institute For Engineering Research And Publication

(IFERP)

Membership No. PM48167520

Validity: 23.1.2021 to 31.12.2021

IEEE Member

IEEE Women in Engineering

IEEE Electron Devices Society

Membership: Professional Member

Membership No.:94246025

Working Experience

Aug.2019-Nov. 2020	: Guest Faculty in Department of ECE at Mizoram University
Nov.2020- currently working	: Casual Teaching Faculty in Department of Electronics at Govt. Zirtiri Residential Science College

Semiconductor Devices, Micro-and -Nanoelectronics, Nanotechnology and VLSI devices for design, fabrication and characterization.

Dept. od ECE, Mizoram University

: Electronics Devices & Circuits, Linear Integrated Circuits, Analog Circuits & Systems, VLSI Design, Power Electronics, Digital Design using HDL

: Analog Circuits & System Laboratory, Electronics Devices & Circuits Laboratory, VLSI Laboratory

Dept. of Electronics, Govt. Zirtiri Residential Science College (GZRSC)

: Electronics-I (B.Sc. Physics), Semiconductor Physics, Environmental Science

:Laboratory-V (Basic Electronics)

Trainings/Workshops/Short Term Courses/National Programme

Feb, 2010	Workshop on "Ethical Hacking & Information Security" conducted by Kyrion Digital Security (IEEE student Chapter & IIT Roorkee)
October, 2010	Workshop on "Fundamentals of Robotics & Electronics" conducted by Technophilia
March, 2011	Workshop on "Embedded System" conducted by Ducat
March, 2011	Workshop on "3D Animation" conducted by i3indya Technology
August, 2012	Conference on "Science for Shaping the Future of India" as delegate organized by Indian Science Congress Association (ISCA) Banasthali Chapter
October, 2017	Ek Bharat Shrestha Bharat (EBSB) programme hosted by NIT Tripura
January, 2018	Ek Bharat Shrestha Bharat (EBSB) programme hosted by IIIT Bhagalpur
January, 2018	Ek Bharat Shrestha Bharat (EBSB) programme hosted by NIT Patna
April, 2018	Ek Bharat Shrestha Bharat (EBSB) programme hosted NIT Mizoram
March, 2018	Faculty Development Programme on "VLSI Design using FPGA Tools" organized by E&ICT Academy IIT Guwahati
October, 2018	Short Term Course on " Application of Synopsis Sentaurus TCAD Tool in Modelling Devices" organized by E&ICT Academy IIT Guwahati
April, 2019	Short Term Course on "Microwave Techniques in Wireless Applications" mentored by IIT Kharagpur
3^rdJune, 2020	National Webinar on " Role of Channel State Information in Adaptation and Resource Allocation in Next Generation Wireless System" and "Wide Bandgap Semiconductors: Past, Present and Future " organized by Dept. of ECE, Mizoram University.
30^th June, 2020	National Webinar on "Gender Issues and Impact of Covid-19 on Women" organized by UGC-Women's Studies Centre, Mizoram University in collaboration with UGC
3^rdJuly, 2020	Faculty Development Programme on "Latex" conducted by Dept. of Information Technology, Mizoram University in association with Spoken Tutorial Project, IIT Bombay under Pandit Madan Mohan Malaviya National Mission on Teachers and Teaching (PMMMNMTT), MHRD, Govt. of India.
14^th October, 2020	National Webinar on "Advances in Materials for Smart Systems" organized by Dept. of ECE, Mizoram University.
15^th -19^th Feb, 2021	Faculty Development Programme (FDP) ;5 Days National Workshop on Sensors Technology; organized by Department of Electronics and communication engineering, Mizoram university (Attended & also a Member of Local Organizing Committee)
5^th- 9^th April, 2021	5 Days Faculty Development programme for Teaching and Non-Teaching Staff , Govt. Zirtiri Residential science College
29th April, 2021	Machine Learning Enabled Design Automation and Optimization for Electric Transportation Power Systems , IEEE PELS DMC
30th April, 2021	Professional Webinar on India Patents Act, 1970. organized by TURNIP Innovations
29th April - 13 May 2021	2 Week Online Patent Course by Turnip Innovations
25th May, 2021	Webinar on "The science of Learning" organized by Mizoram University
3rd June, 2021	International Webinar on "COVID19: Disruption of Life Process Impacting Mental Health" organized by Mizoram University
5th June, 2021	International Webinar on Ecosystem Restoration - Reimagine, Recreate and Restoration organized by Govt. Zirtiri Residential Science College, Aizawl Mizoram
15th June, 2021	Webinar on "Towards explainable AI: ethics and social responsibility in human-machine symbiosis by Massimiliano Pirani" organized by IEEE Industrial Electronics Society

This page was updated on 26th October 2021

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